Job Description

Only GC or USC can apply.

Job Title: Memory Firmware Engineer

Work Location: US- Boston, MA

Also consider candidates from the following states.

Santa Clara, California, San Diego, CA, Austin, TX, and Portland, Oregon,

Job description:

• This opportunity includes enabling of new PHY designs at the microarchitecture, firmware/hardware co-design, and algorithm design level.

RESPONSIBILITIES:

• Firmware design and development of DDR PHY & DRAM Training steps
• Firmware development of DDR PHY for ATE Testing, IP Char & SoC Power
• Pre-silicon FW coding and simulation against Architectural and RTL models
• Post-silicon lab bring-up and optimization of DDR Init and Run Time FW
• Post-silicon DDR Training enhancements to enable robust links for higher reliability / higher frequency margin
• Working with SoC/Product firmware teams to define features and specs

Preference & Skill Sets :

• +5 years’ experience as a firmware engineer.
• Excellent knowledge of C, C++, and any scripting language, such as Python.
• Good Knowledge of Verilog/SystemVerilog and digital simulation debug.
• Ability to adapt and learn new toolsets and frameworks is required.
• Strong understanding of synchronization techniques (handshakes, message passing); knowledge of hardware-level clocking and synchronization is a plus
• Post-silicon experience developing firmware on real hardware is required. Experience with SERDES, DDR, and Memory Controller Design experience is preferred
• Strong understanding of computer organization/architecture.
• Laboratory experience, including the use of equipment: oscilloscopes, logic analyzers, etc.
• Experience with low level, physical phenomena-oriented logic design is an asset (dealing with IO, clocking, voltage control, etc.)

EDUCATION:

• Bachelor’s degree in electrical or computer engineering is strongly desired. Master's or PhD degree is a plus.

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